High-Reliability Design Based on Bit-Level Repair Techniques

Yaxing Zhou; Ao Shen

doi:10.47297/taposatWSP2633-456919.20250605

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High-Reliability Design Based on Bit-Level Repair Techniques

Volume 6, Issue 5

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High-Reliability Design Based on Bit-Level Repair Techniques
High-Reliability Design Based on Bit-Level Repair Techniques
Zhejiang Hikstor Technology Co., Ltd., Hangzhou, Zhejiang, China, 311300
Vol. 6, Issue 5, Pages: 94-99(2025)
Published：19 May 2025
DOI：10.47297/taposatWSP2633-456919.20250605
Accepted：

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Zhou Yaxing,Shen Ao.High-Reliability Design Based on Bit-Level Repair Techniques[J].Theory and Practice of Science and Technology,2025,06(05):94-99.
DOI：

Zhou Yaxing,Shen Ao.High-Reliability Design Based on Bit-Level Repair Techniques[J].Theory and Practice of Science and Technology,2025,06(05):94-99. DOI： 10.47297/taposatWSP2633-456919.20250605.

摘要

Abstract

Traditional memory technologies are gradually difficult to meet the demands of high-reliability applications such as automotive electronics and aerospace systems. Spin-transfer torque magnetic random-access memory (STT-MRAM) has emerged as a promising alternative due to its fast read/write speed

high endurance

and full compatibility with CMOS processes. However

the unique physical properties of STT-MRAM pose challenges including hard errors (e.g.

shorts) and various types of soft errors. To address these issues

this paper proposes a high-reliability design based on bit-level repair

allowing defective bits to be repaired through dedicated conversion circuits. This approach supports both hard errors repair prior to chip fabrication and real-time repair during the product's operational lifetime

With minimal redundancy and low design complexity

the proposed method significantly improves device endurance and yield.

关键词

Keywords

references

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osomi M, Yamagishi H, Yamamoto T, et al. A novel nonvolatile memory with spin torque transfer magnetization switching: Spin-RAM[C]//IEEE International Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE, 2005: 459-462.

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